Job Description:
Responsibilities includes all aspects of physical design including synthesis, floor planning, place and route, Clock Tree Synthesis, Clock Distribution, IP integration, extraction, Timing closure, Power and Signal Integrity Analysis, Physical Verification, DFM and Tape Out. Should be able to interface with Front End Design team to resolve Design Issues
Mentoring new team member
Salary: Not Disclosed by Recruiter
Industry: IT-Software / Software Services
Functional Area: IT Software – Embedded, EDA, VLSI, ASIC, Chip Design
Role Category: Programming & Design
Role: Team Lead/Technical Lead
Employment Type: Permanent Job, Full Time
Keyskills:
Timing ClosurePhysical DesignFloor PlanningPhysical VerificationSignal IntegritySynthesisFront End DesignDesign
Desired Candidate Profile:
Experience (In Month): 84
Qualification: BE/ME
Education:UG -B.Tech/B.E. – Any Specialization
PG – M.Tech – Any Specialization, Any Postgraduate – Any Specialization
Doctorate – Doctorate Not Required
Company Profile:
Aricent Technologies (H) Limited
Aricent is the worlds No. 1 pure-play product engineering services and software firm. The company has 20-plus years experience co-creating ambitious products with the leading networking, telecom, software, semiconductor, Internet and industrial companies. The firm’s 10,000-plus engineers focus exclusively on software-powered innovation for the connected world.
Based in San Francisco, frog, the global leader in innovation and design, is part of Aricent. The companys key investors are Kohlberg Kravis Roberts Co. and Sequoia Capital.
Contact Details
Recruiter Name:HR
Contact Company:Aricent Technologies (H) Limited
Reference Id:11364