Opening for DFT Engineer in Malaysia

Job Description:

Job Opening with CMMI Level 5 Company

Location: Malaysia
Position: Permanent

JD: DFT Engineer

5+ years of experience.
Experience in Design for Test (DFT) of large, lower geometry SOC designs.
Experience in DFT concepts, test mode.
Boundary Scan, ATPG Scan.
VHDL/Verilog coding, testmench setup, test case creation and verification
Good to have mixed signal IP verification such PCIe Phy, PLL etc
DFT and Verification (Synopsys, Cadence)
Scripting/programming using C, C++, Perl

Salary:INR 15,00,000 – 20,00,000 P.A

Industry:Semiconductors / Electronics

Functional Area:IT Software – Embedded , EDA , VLSI , ASIC , Chip Design

Role Category:Programming & Design

Role:Testing Engineer

Atpg DFT Scan Validation VHDL DFT Engineer

Desired Candidate Profile:
UG: Any Graduate – Any Specialization
PG:Any Postgraduate – Any Specialization
Doctorate:Any Doctorate – Any Specialization, Doctorate Not Required
Please refer to the Job description above

Company Profile:
Macropace Technologies
CMMI level 5 Company
Leading IT Recruitment Firm

Contact Details:
Recruiter Name:Poornima,