Low-cost 3D fingerprint scanner for smartphones

Scientists have developed a new ultrasonic 3D fingerprint scanner that could be used in smartphones and other devices to improve security.

The sensor measures 3D image of your finger’s surface and the tissue beneath it – enhancing biometrics and information security for smartphones and other devices.

Fingerprint sensor technology currently used in smartphones produces a two-dimensional image of a finger’s surface, which can be spoofed fairly easily with a printed image of the fingerprint.

The newly developed ultrasonic sensor eliminates that risk by imaging the ridges and valleys of the fingerprint’s surface, and the tissue beneath, in three dimensions.

“Using passwords for smartphones was a big security problem, so we anticipated that a biometric solution was ahead,” said David A Horsley, a professor of mechanical and aerospace engineering at the University of California, Davis.

“Ultrasound images are collected in the same way that medical ultrasound is conducted,” said Horsley.

“Transducers on the chip’s surface emit a pulse of ultrasound, and these same transducers receive echoes returning from the ridges and valleys of your fingerprint’s surface,” he said.

The basis for the ultrasound sensor is an array of microelectromechanical systems (MEMS) ultrasound devices with highly uniform characteristics, and therefore very similar frequency response characteristics.

To fabricate their imager, the group employed existing MEMS technology, which smartphones rely on for such functions as microphones and directional orientation.

They used a modified version of the manufacturing process used to make the MEMS accelerometer and gyroscope found in the iPhone and many other consumer electronics devices.

“Our chip is fabricated from two wafers – a MEMS wafer that contains the ultrasound transducers and a CMOS wafer that contains the signal processing circuitry,” said Horsley.

“These wafers are bonded together, then the MEMS wafer is ‘thinned’ to expose the ultrasound transducers,” he said.

CMOS, or complementary metal oxide semiconductor, is the silicon-based technology used to make transistors in microchips.

The imager is powered by a 1.8-Volt power supply, using a power-efficient charge pump on their ASIC or application-specific integrated circuit.

“Our ultrasound transducers have high sensitivity and the receiver electronics are located directly beneath the array, which results in low electrical parasitics,” Horsley said.

“Using low-voltage integrated circuits will reduce the cost of our sensor and open up myriad new applications where the cost, size, and power consumption of existing ultrasound sensors are currently prohibitive,” he added.

The research appears in the journal Applied Physics Letters.

PTI