Hiring For Power Verification Engineer

Job Description:

Requirement Location :Hyderabad

Years of Experience: 3-8years

General profile: Experience in static and dynamic power verification

Knowledge and Experience with Verilog, VHDL, System Verilog, UPF

Programming Languages: C, C++, Perl, Shell, Tcl

Vendor Tools: VCS, VCS-NLP, VC-LP

Knowledge, understanding as well as experience with the UPF format is a must

Salary: Not Disclosed by Recruiter
Industry:IT-Software / Software Services
Functional Area:IT Software – Embedded , EDA , VLSI , ASIC , Chip Design
Role Category:Programming & Design
Role:Software Developer


C System Verilog VHDL Perl C++ Verification TCL Languages VCS Programming

Desired Candidate Profile:


UG: Any Graduate – Any Specialization
PG:Any Postgraduate
Doctorate:Doctorate Not Required

Company Profile:

Magna Infotech Pvt Ltd
Magna Infotech Pvt Ltd